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stm32 /stm32l0 /STM32L0x1 /PWR /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUF)WUF 0 (SBF)SBF 0 (PVDO)PVDO 0 (VREFINTRDYF)VREFINTRDYF 0 (VOSF)VOSF 0 (REGLPF)REGLPF 0 (EWUP1)EWUP1 0 (EWUP2)EWUP2 0 (EWUP3)EWUP3

Description

power control/status register

Fields

WUF

Wakeup flag
SBF

Standby flag
PVDO

PVD output
VREFINTRDYF

Internal voltage reference (VREFINT) ready flag This bit indicates the state of the internal voltage reference, VREFINT.
VOSF

Voltage Scaling select flag
REGLPF

Regulator LP flag
EWUP1

Enable WKUP pin 1
EWUP2

Enable WKUP pin 2
EWUP3

Enable WKUP pin 3

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32