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stm32 /stm32l0 /STM32L0x2 /GPIOB /AFRL

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Interpret as AFRL

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https://regviz.com/r/stm32/stm32l0/STM32L052/GPIOB/AFRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFSEL00AFSEL10AFSEL20AFSEL30AFSEL40AFSEL50AFSEL60AFSEL7

Description

GPIO alternate function low register

Fields

AFSEL0

Alternate function selection for port x pin y (y = 0…7)
AFSEL1

Alternate function selection for port x pin y (y = 0…7)
AFSEL2

Alternate function selection for port x pin y (y = 0…7)
AFSEL3

Alternate function selection for port x pin y (y = 0…7)
AFSEL4

Alternate function selection for port x pin y (y = 0…7)
AFSEL5

Alternate function selection for port x pin y (y = 0…7)
AFSEL6

Alternate function selection for port x pin y (y = 0…7)
AFSEL7

Alternate function selection for port x pin y (y = 0…7)

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32