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stm32 /stm32l0 /STM32L0x2 /LPTIM /ICR

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Interpret as ICR

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https://regviz.com/r/stm32/stm32f7/STM32F730/LPTIM1/ICR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CMPMCF)CMPMCF 0 (ARRMCF)ARRMCF 0 (EXTTRIGCF)EXTTRIGCF 0 (CMPOKCF)CMPOKCF 0 (ARROKCF)ARROKCF 0 (UPCF)UPCF 0 (DOWNCF)DOWNCF

Description

Interrupt Clear Register

Fields

CMPMCF

compare match Clear Flag
ARRMCF

Autoreload match Clear Flag
EXTTRIGCF

External trigger valid edge Clear Flag
CMPOKCF

Compare register update OK Clear Flag
ARROKCF

Autoreload register update OK Clear Flag
UPCF

Direction change to UP Clear Flag
DOWNCF

Direction change to down Clear Flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32