Regviz

stm32 /stm32l0 /STM32L0x2 /TIM22 /OR

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Interpret as OR

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https://regviz.com/r/stm32/stm32l0/STM32L053/TIM22/OR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ETR_RMP 0TI1_RMP

Description

TIM22 option register

Fields

ETR_RMP

Timer22 ETR remap
TI1_RMP

Timer22 TI1

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32