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stm32 /stm32l0 /STM32L0x3 /ADC /ISR

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Interpret as ISR

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https://regviz.com/r/stm32/stm32l0/STM32L062/ADC/ISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADRDY)ADRDY 0 (EOSMP)EOSMP 0 (EOC)EOC 0 (EOS)EOS 0 (OVR)OVR 0 (AWD)AWD 0 (EOCAL)EOCAL

Description

interrupt and status register

Fields

ADRDY

ADC ready
EOSMP

End of sampling flag
EOC

End of conversion flag
EOS

End of sequence flag
OVR

ADC overrun
AWD

Analog watchdog flag
EOCAL

End Of Calibration flag

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32