Regviz

stm32 /stm32l0 /STM32L0x3 /AES /IVR0

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Interpret as IVR0

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https://regviz.com/r/stm32/stm32f4/STM32F413/AES/IVR0#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AES_IVR0

Description

initialization vector register 0

Fields

AES_IVR0

initialization vector register (LSB IVR [31:0])

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32