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stm32 /stm32l0 /STM32L0x3 /DAC /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN1)EN1 0 (BOFF1)BOFF1 0 (TEN1)TEN1 0TSEL10WAVE1 0MAMP10 (DMAEN1)DMAEN1 0 (DMAUDRIE1)DMAUDRIE1

Description

control register

Fields

EN1

DAC channel1 enable
BOFF1

DAC channel1 output buffer disable
TEN1

DAC channel1 trigger enable
TSEL1

DAC channel1 trigger selection
WAVE1

DAC channel1 noise/triangle wave generation enable
MAMP1

DAC channel1 mask/amplitude selector
DMAEN1

DAC channel1 DMA enable
DMAUDRIE1

DAC channel1 DMA Underrun Interrupt enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32