Regviz

stm32 /stm32l0 /STM32L0x3 /GPIOB /AFRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as AFRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32l0/STM32L053/GPIOA/AFRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFSEL00AFSEL10AFSEL20AFSEL30AFSEL40AFSEL50AFSEL60AFSEL7

Description

GPIO alternate function low register

Fields

AFSEL0

Alternate function selection for port x pin y (y = 0…7)
AFSEL1

Alternate function selection for port x pin y (y = 0…7)
AFSEL2

Alternate function selection for port x pin y (y = 0…7)
AFSEL3

Alternate function selection for port x pin y (y = 0…7)
AFSEL4

Alternate function selection for port x pin y (y = 0…7)
AFSEL5

Alternate function selection for port x pin y (y = 0…7)
AFSEL6

Alternate function selection for port x pin y (y = 0…7)
AFSEL7

Alternate function selection for port x pin y (y = 0…7)

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32