Regviz

stm32 /stm32l1 /STM32L151 /LCD /CLR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CLR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32l1/STM32L162/LCD/CLR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SOFC)SOFC 0 (UDDC)UDDC

Description

clear register

Fields

SOFC

Start of frame flag clear
UDDC

Update display done clear

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32