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stm32 /stm32l1 /STM32L152 /DBGMCU /APB2_FZ

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Interpret as APB2_FZ

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_TIM9_STOP)DBG_TIM9_STOP 0 (DBG_TIM10_STOP)DBG_TIM10_STOP 0 (DBG_TIM11_STOP)DBG_TIM11_STOP

Description

Debug MCU APB1 freeze register 2

Fields

DBG_TIM9_STOP

TIM counter stopped when core is halted
DBG_TIM10_STOP

TIM counter stopped when core is halted
DBG_TIM11_STOP

TIM counter stopped when core is halted

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32