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stm32 /stm32l4+ /STM32L4Q5 /RCC /AHB3RSTR

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Interpret as AHB3RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FMCRST)FMCRST 0 (OSPI2RST)OSPI2RST

Description

AHB3 peripheral reset register

Fields

FMCRST

Flexible memory controller reset
OSPI2RST

OctOSPI2 memory interface reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32