Regviz

stm32 /stm32l4+ /STM32L4R5 /CRC /CR

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Interpret as CR

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https://regviz.com/r/stm32/stm32g4/STM32G473/CRC/CR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RESET)RESET 0POLYSIZE 0REV_IN 0 (REV_OUT)REV_OUT

Description

Control register

Fields

RESET

RESET bit
POLYSIZE

Polynomial size
REV_IN

Reverse input data
REV_OUT

Reverse output data

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32