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stm32 /stm32l4+ /STM32L4R5 /OTG_FS_GLOBAL /FS_GRSTCTL

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Interpret as FS_GRSTCTL

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31282724232019161512118743000000000000000000000000000000000000000000 (CSRST)CSRST0 (HSRST)HSRST0 (FCRST)FCRST0 (RXFFLSH)RXFFLSH0 (TXFFLSH)TXFFLSH0TXFNUM0 (AHBIDL)AHBIDL

Description

OTG_FS reset register (OTG_FS_GRSTCTL)

Fields

CSRST

Core soft reset
HSRST

HCLK soft reset
FCRST

Host frame counter reset
RXFFLSH

RxFIFO flush
TXFFLSH

TxFIFO flush
TXFNUM

TxFIFO number
AHBIDL

AHB master idle

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32