Regviz

stm32 /stm32l4+ /STM32L4S5 /GFXMMU /B2CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as B2CR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32l4+/STM32L4R5/GFXMMU/B2CR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PBO0PBBA

Description

Graphic MMU buffer 2 configuration register

Fields

PBO

Physical buffer offset
PBBA

Physical buffer base address

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32