BKINE=B_0x0, BKCMP1P=B_0x0, BKINP=B_0x0, BKDF1BK2E=B_0x0, BKCMP1E=B_0x0, BKCMP2E=B_0x0, BKCMP2P=B_0x0
TIM17 alternate function register 1
| BKINE | BRK BKIN input enable This bit enables the BKIN alternate function input for the timer s BRK input. BKIN input is ORed with the other BRK sources. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): BKIN input disabled 1 (B_0x1): BKIN input enabled |
| BKCMP1E | BRK COMP1 enable This bit enables the COMP1 for the timer s BRK input. COMP1 output is ORed with the other BRK sources. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): COMP1 input disabled 1 (B_0x1): COMP1 input enabled |
| BKCMP2E | BRK COMP2 enable This bit enables the COMP2 for the timer s BRK input. COMP2 output is ORed with the other BRK sources. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): COMP2 input disabled 1 (B_0x1): COMP2 input enabled |
| BKDF1BK2E | BRK dfsdm1_break[2] enable This bit enables the dfsdm1_break[2] for the timer s BRK input. dfsdm1_break[2] output is ORed with the other BRK sources. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): dfsdm1_break[2] input disabled 1 (B_0x1): dfsdm1_break[2] input enabled |
| BKINP | BRK BKIN input polarity This bit selects the BKIN alternate function input sensitivity. It must be programmed together with the BKP polarity bit. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): BKIN input is active low 1 (B_0x1): BKIN input is active high |
| BKCMP1P | BRK COMP1 input polarity This bit selects the COMP1 input sensitivity. It must be programmed together with the BKP polarity bit. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): COMP1 input is active low 1 (B_0x1): COMP1 input is active high |
| BKCMP2P | BRK COMP2 input polarity This bit selects the COMP2 input sensitivity. It must be programmed together with the BKP polarity bit. Note: This bit can not be modified as long as LOCK level 1 has been programmed (LOCK bits in TIMx_BDTR register). 0 (B_0x0): COMP2 input is active low 1 (B_0x1): COMP2 input is active high |