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stm32 /stm32l4+ /STM32L4S7 /DAC /SWTRIGR

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Interpret as SWTRIGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWTRIG1)SWTRIG1 0 (SWTRIG2)SWTRIG2

Description

software trigger register

Fields

SWTRIG1

DAC channel1 software trigger
SWTRIG2

DAC channel2 software trigger

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32