Regviz

stm32 /stm32l4+ /STM32L4S7 /FLASH /ACR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ACR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32l4/STM32L412/FLASH/ACR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LATENCY 0 (PRFTEN)PRFTEN 0 (ICEN)ICEN 0 (DCEN)DCEN 0 (ICRST)ICRST 0 (DCRST)DCRST 0 (RUN_PD)RUN_PD 0 (SLEEP_PD)SLEEP_PD

Description

Access control register

Fields

LATENCY

Latency
PRFTEN

Prefetch enable
ICEN

Instruction cache enable
DCEN

Data cache enable
ICRST

Instruction cache reset
DCRST

Data cache reset
RUN_PD

Flash Power-down mode during Low-power run mode
SLEEP_PD

Flash Power-down mode during Low-power sleep mode

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32