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stm32 /stm32l4+ /STM32L4S7 /OCTOSPI1 /CCR

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Interpret as CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0IMODE0 (IDTR)IDTR 0ISIZE 0ADMODE 0 (ADDTR)ADDTR 0ADSIZE 0ABMODE 0 (ABDTR)ABDTR 0ABSIZE 0DMODE0 (DDTR)DDTR 0 (DQSE)DQSE 0 (SIOO)SIOO

Description

communication configuration register

Fields

IMODE

Instruction mode
IDTR

Instruction double transfer rate
ISIZE

Instruction size
ADMODE

Address mode
ADDTR

Address double transfer rate
ADSIZE

Address size
ABMODE

Alternate byte mode
ABDTR

Alternate bytes double transfer rate
ABSIZE

Alternate bytes size
DMODE

Data mode
DDTR

Alternate bytes double transfer rate
DQSE

DQS enable
SIOO

Send instruction only once mode

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32