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stm32 /stm32l4+ /STM32L4S7 /OCTOSPI1 /HWCFGR

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Interpret as HWCFGR

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31282724232019161512118743000000000000000000000000000000000000000000AXI0FIFO0PRES0IDL0MMW0MST

Description

HW configuration register

Fields

AXI

AXI interface
FIFO

FIFO depth
PRES

Prescaler
IDL

ID Length
MMW

Memory map write
MST

Master

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32