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stm32 /stm32l4+ /STM32L4S7 /SWPMI1 /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXDMA)RXDMA 0 (TXDMA)TXDMA 0 (RXMODE)RXMODE 0 (TXMODE)TXMODE 0 (LPBK)LPBK 0 (SWPME)SWPME 0 (DEACT)DEACT

Description

SWPMI Configuration/Control register

Fields

RXDMA

Reception DMA enable
TXDMA

Transmission DMA enable
RXMODE

Reception buffering mode
TXMODE

Transmission buffering mode
LPBK

Loopback mode enable
SWPME

Single wire protocol master interface enable
DEACT

Single wire protocol master interface deactivate

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32