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stm32 /stm32l4+ /STM32L4S7 /TIM5 /TIM5_AF1

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Interpret as TIM5_AF1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ETRSEL

ETRSEL=B_0x0

Description

TIM5 alternate function option register 1

Fields

ETRSEL

ETR source selection These bits select the ETR input source. Others: Reserved

0 (B_0x0): ETR input is connected to I/O

1 (B_0x1): SAI2 FS_A connected to ETR input

2 (B_0x2): SAI2 FS_B connected to ETR input

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32