TI3SEL=B_0x0, TI2SEL=B_0x0, TI4SEL=B_0x0, TI1SEL=B_0x0
TIM5 timer input selection register
| TI1SEL | TI1[0] to TI1[15] input selection These bits select the TI1[0] to TI1[15] input source. Others: Reserved 0 (B_0x0): TIM5_CH1 input 1 (B_0x1): fdcan1_tmp 2 (B_0x2): fdcan1_rtp |
| TI2SEL | TI2[0] to TI2[15] input selection These bits select the TI2[0] to TI2[15] input source. Others: Reserved 0 (B_0x0): TIM5_CH2 input |
| TI3SEL | TI3[0] to TI3[15] input selection These bits select the TI3[0] to TI3[15] input source. Others: Reserved 0 (B_0x0): TIM5_CH3 input |
| TI4SEL | TI4[0] to TI4[15] input selection These bits select the TI4[0] to TI4[15] input source. Others: Reserved 0 (B_0x0): TIM5_CH4 input |