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stm32 /stm32l4+ /STM32L4S9 /DAC /CCR

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Interpret as CCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OTRIM10OTRIM2

Description

calibration control register

Fields

OTRIM1

DAC Channel 1 offset trimming value
OTRIM2

DAC Channel 2 offset trimming value

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32