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stm32 /stm32l4+ /STM32L4S9 /DAC /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN1)EN1 0 (TEN1)TEN1 0TSEL10WAVE1 0MAMP10 (DMAEN1)DMAEN1 0 (DMAUDRIE1)DMAUDRIE1 0 (CEN1)CEN1 0 (EN2)EN2 0 (TEN2)TEN2 0TSEL20WAVE2 0MAMP20 (DMAEN2)DMAEN2 0 (DMAUDRIE2)DMAUDRIE2 0 (CEN2)CEN2

Description

control register

Fields

EN1

DAC channel1 enable
TEN1

DAC channel1 trigger enable
TSEL1

DAC channel1 trigger selection
WAVE1

DAC channel1 noise/triangle wave generation enable
MAMP1

DAC channel1 mask/amplitude selector
DMAEN1

DAC channel1 DMA enable
DMAUDRIE1

DAC channel1 DMA Underrun Interrupt enable
CEN1

DAC Channel 1 calibration enable
EN2

DAC channel2 enable
TEN2

DAC channel2 trigger enable
TSEL2

DAC channel2 trigger selection
WAVE2

DAC channel2 noise/triangle wave generation enable
MAMP2

DAC channel2 mask/amplitude selector
DMAEN2

DAC channel2 DMA enable
DMAUDRIE2

DAC channel2 DMA underrun interrupt enable
CEN2

DAC Channel 2 calibration enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32