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stm32 /stm32l4+ /STM32L4S9 /RCC /AHB1RSTR

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Interpret as AHB1RSTR

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https://regviz.com/r/stm32/stm32l4+/STM32L4R5/RCC/AHB1RSTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA1RST)DMA1RST 0 (DMA2RST)DMA2RST 0 (DMAMUX1RST)DMAMUX1RST 0 (FLASHRST)FLASHRST 0 (CRCRST)CRCRST 0 (TSCRST)TSCRST 0 (DMA2DRST)DMA2DRST 0 (GFXMMURST)GFXMMURST

Description

AHB1 peripheral reset register

Fields

DMA1RST

DMA1 reset
DMA2RST

DMA2 reset
DMAMUX1RST

DMAMUXRST
FLASHRST

Flash memory interface reset
CRCRST

CRC reset
TSCRST

Touch Sensing Controller reset
DMA2DRST

DMA2D reset
GFXMMURST

GFXMMU reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32