stm32 /stm32l4+ /STM32L4S9 /RCC /AHB2SMENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as AHB2SMENR

Description

AHB2 peripheral clocks enable in Sleep and Stop modes register

Fields

GPIOASMEN	IO port A clocks enable during Sleep and Stop modes
GPIOBSMEN	IO port B clocks enable during Sleep and Stop modes
GPIOCSMEN	IO port C clocks enable during Sleep and Stop modes
GPIODSMEN	IO port D clocks enable during Sleep and Stop modes
GPIOESMEN	IO port E clocks enable during Sleep and Stop modes
GPIOFSMEN	IO port F clocks enable during Sleep and Stop modes
GPIOGSMEN	IO port G clocks enable during Sleep and Stop modes
GPIOHSMEN	IO port H clocks enable during Sleep and Stop modes
GPIOISMEN	IO port I clocks enable during Sleep and Stop modes
SRAM2SMEN	SRAM2 interface clocks enable during Sleep and Stop modes
SRAM3SMEN	SRAM2 interface clocks enable during Sleep and Stop modes
OTGFSSMEN	OTG full speed clocks enable during Sleep and Stop modes
ADCFSSMEN	ADC clocks enable during Sleep and Stop modes
DCMISMEN	DCMI clock enable during Sleep and Stop modes
AESSMEN	AES accelerator clocks enable during Sleep and Stop modes
HASHSMEN	HASH clock enable during Sleep and Stop modes
RNGSMEN	Random Number Generator clocks enable during Sleep and Stop modes
OSPIMSMEN	OctoSPI IO manager clocks enable during Sleep and Stop modes
SDMMC1SMEN	SDMMC1 clocks enable during Sleep and Stop modes

Links

()