Regviz

stm32 /stm32l4 /STM32L496 /DAC /DHR8RD

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DHR8RD

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32l4/STM32L476/DAC/DHR8RD#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DACC1DHR0DACC2DHR

Description

DUAL DAC 8-bit right aligned data holding register

Fields

DACC1DHR

DAC channel1 8-bit right-aligned data
DACC2DHR

DAC channel2 8-bit right-aligned data

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32