Regviz

stm32 /stm32l4 /STM32L496 /EXTI /RTSR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RTSR2

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Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32l4/STM32L476/EXTI/RTSR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RT35)RT35 0 (RT36)RT36 0 (RT37)RT37 0 (RT38)RT38

Description

Rising Trigger selection register

Fields

RT35

Rising trigger event configuration bit of line 35
RT36

Rising trigger event configuration bit of line 36
RT37

Rising trigger event configuration bit of line 37
RT38

Rising trigger event configuration bit of line 38

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32