Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text
Description
APB1 peripheral clocks enable in Sleep and Stop modes register 2
Fields
LPUART1SMEN | Low power UART 1 clocks enable during Sleep and Stop modes
|
I2C4SMEN | I2C4 clocks enable during Sleep and Stop modes
|
SWPMI1SMEN | Single wire protocol clocks enable during Sleep and Stop modes
|
LPTIM2SMEN | |
Links
(
)