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stm32 /stm32l4 /STM32L4x2 /FLASH /WRP1AR

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Interpret as WRP1AR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0WRP1A_STRT0WRP1A_END

Description

Flash Bank 1 WRP area A address register

Fields

WRP1A_STRT

WRP first area A start offset
WRP1A_END

WRP first area A end offset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32