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stm32 /stm32l4 /STM32L4x2 /PWR /SR1

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Interpret as SR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WUF1)WUF1 0 (WUF2)WUF2 0 (WUF3)WUF3 0 (WUF4)WUF4 0 (WUF5)WUF5 0 (SBF)SBF 0 (EXT_SMPS_RDY)EXT_SMPS_RDY 0 (WUFI)WUFI

Description

Power status register 1

Fields

WUF1

Wakeup flag 1
WUF2

Wakeup flag 2
WUF3

Wakeup flag 3
WUF4

Wakeup flag 4
WUF5

Wakeup flag 5
SBF

Standby flag
EXT_SMPS_RDY

External SMPS Ready
WUFI

Wakeup flag internal

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32