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stm32 /stm32l4 /STM32L4x2 /RCC /AHB3SMENR

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Interpret as AHB3SMENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (QSPISMEN)QSPISMEN

Description

AHB3 peripheral clocks enable in Sleep and Stop modes register

Fields

QSPISMEN

QSPISMEN

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32