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stm32 /stm32l4 /STM32L4x6 /SDMMC1 /CMD

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Interpret as CMD

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CMDINDEX0WAITRESP 0 (WAITINT)WAITINT 0 (WAITPEND)WAITPEND 0 (CPSMEN)CPSMEN 0 (SDIOSuspend)SDIOSuspend 0 (ENCMDcompl)ENCMDcompl 0 (nIEN)nIEN 0 (CE_ATACMD)CE_ATACMD

Description

command register

Fields

CMDINDEX

Command index
WAITRESP

Wait for response bits
WAITINT

CPSM waits for interrupt request
WAITPEND

CPSM Waits for ends of data transfer (CmdPend internal signal)
CPSMEN

Command path state machine (CPSM) Enable bit
SDIOSuspend

SD I/O suspend command
ENCMDcompl

Enable CMD completion
nIEN

not Interrupt Enable
CE_ATACMD

CE-ATA command

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32