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stm32 /stm32l5 /STM32L562 /GTZC_MPCBB1 /MPCBB1_CR

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Interpret as MPCBB1_CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LCK)LCK 0 (INVSECSTATE)INVSECSTATE 0 (SRWILADIS)SRWILADIS

Description

MPCBB control register

Fields

LCK

LCK
INVSECSTATE

INVSECSTATE
SRWILADIS

SRWILADIS

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32