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stm32 /stm32l5 /STM32L562 /GTZC_TZIC /FCR3

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Interpret as FCR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TZSCFC)TZSCFC 0 (TZICFC)TZICFC 0 (MPCWM1FC)MPCWM1FC 0 (MPCWM2FC)MPCWM2FC 0 (MPCBB1FC)MPCBB1FC 0 (MPCBB1_REGFC)MPCBB1_REGFC 0 (MPCBB2FC)MPCBB2FC 0 (MPCBB2_REGFC)MPCBB2_REGFC

Description

TZIC interrupt clear register 3

Fields

TZSCFC

TZSCFC
TZICFC

TZICFC
MPCWM1FC

MPCWM1FC
MPCWM2FC

MPCWM2FC
MPCBB1FC

MPCBB1FC
MPCBB1_REGFC

MPCBB1_REGFC
MPCBB2FC

MPCBB2FC
MPCBB2_REGFC

MPCBB2_REGFC

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32