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stm32 /stm32l5 /STM32L562 /ICache /ICACHE_CR

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Interpret as ICACHE_CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0 (CACHEINV)CACHEINV 0 (WAYSEL)WAYSEL 0 (HITMEN)HITMEN 0 (MISSMEN)MISSMEN 0 (HITMRST)HITMRST 0 (MISSMRST)MISSMRST

Description

ICACHE control register

Fields

EN

EN
CACHEINV

CACHEINV
WAYSEL

WAYSEL
HITMEN

HITMEN
MISSMEN

MISSMEN
HITMRST

HITMRST
MISSMRST

MISSMRST

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32