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stm32 /stm32l5 /STM32L562 /RCC /AHB1SECSR

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Interpret as AHB1SECSR

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https://regviz.com/r/stm32/stm32l5/STM32L552/RCC/AHB1SECSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA1SECF)DMA1SECF 0 (DMA2SECF)DMA2SECF 0 (DMAMUX1SECF)DMAMUX1SECF 0 (FLASHSECF)FLASHSECF 0 (SRAM1SECF)SRAM1SECF 0 (CRCSECF)CRCSECF 0 (TSCSECF)TSCSECF 0 (GTZCSECF)GTZCSECF 0 (ICACHESECF)ICACHESECF

Description

RCC AHB1 security status register

Fields

DMA1SECF

DMA1SECF
DMA2SECF

DMA2SECF
DMAMUX1SECF

DMAMUX1SECF
FLASHSECF

FLASHSECF
SRAM1SECF

SRAM1SECF
CRCSECF

CRCSECF
TSCSECF

TSCSECF
GTZCSECF

GTZCSECF
ICACHESECF

ICACHESECF

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32