Regviz

stm32 /stm32n6 /STM32N647 /ADC1 /ADC_OR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ADC_OR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N655/ADC1/ADC_OR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SELREF 0 (B_0x0)SELBG 0 (B_0x0)VDDCOREEN

VDDCOREEN=B_0x0, SELBG=B_0x0, SELREF=B_0x0

Description

ADC option register

Fields

SELREF

Internal reference voltage selection

0 (B_0x0): ADC internal reference voltage buffer disabled

1 (B_0x1): ADC internal reference voltage buffer enabled
SELBG

Bandgap selection

0 (B_0x0): ADC internal bandgap disabled

1 (B_0x1): ADC internal bandgap enabled
VDDCOREEN

VDDCORE enable

0 (B_0x0): Vless thansub>DDCOREless than/sub> channel disabled

1 (B_0x1): Vless thansub>DDCOREless than/sub> channel enabled

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32