RegViz: Visualize ADC_SMPR1 Bitfield

stm32 /stm32n6 /STM32N647 /ADC1 /ADC_SMPR1

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Interpret as ADC_SMPR1

SMP0=B_0x0, SMP6=B_0x0, SMP8=B_0x0, SMP5=B_0x0, SMP9=B_0x0, SMP2=B_0x0, SMP1=B_0x0, SMP3=B_0x0, SMP7=B_0x0, SMP4=B_0x0

Description

ADC sample time register 1

Fields

SMP0	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP1	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP2	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP3	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP4	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP5	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP6	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP7	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP8	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles
SMP9	Channel x sampling time selection 0 (B_0x0): 2.5 ADC clock cycles 1 (B_0x1): 3.5 ADC clock cycles 2 (B_0x2): 7.5 ADC clock cycles 3 (B_0x3): 12.5 ADC clock cycles 4 (B_0x4): 24.5 ADC clock cycles 5 (B_0x5): 47.5 ADC clock cycles 6 (B_0x6): 247.5 ADC clock cycles 7 (B_0x7): 1501.5 ADC clock cycles

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