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stm32 /stm32n6 /STM32N647 /BSEC /BSEC_HDPLSR

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Interpret as BSEC_HDPLSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HDPL

Description

BSEC HDPL

Fields

HDPL

current HDPL

81 (B_0x51): Level 1

111 (B_0x6F): Level 3

138 (B_0x8A): Level 2

180 (B_0xB4): Level 0

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32