stm32 /stm32n6 /STM32N647 /CSI /CSI_LMCFGR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CSI_LMCFGR

31282724232019161512118743000000000000000000000000000000000000000000LANENB0DL0MAP0DL1MAP

Description

CSI-2 Host lane merger configuration register

Fields

LANENB

Number of lanes

1 (B_0x1): 1 lane for the reception

2 (B_0x2): 2 lanes for the reception

DL0MAP

Physical mapping of logical data lane 0

1 (B_0x1): Physical data lane 0 connected to logical data lane 0

2 (B_0x2): Physical data lane 0 connected to logical data lane 1

DL1MAP

Physical mapping of logical data lane 1

1 (B_0x1): Physical data lane 1 connected to logical data lane 0

2 (B_0x2): Physical data lane 1 connected to logical data lane 1

Links

()