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stm32 /stm32n6 /STM32N647 /DBGMCU /DBGMCU_AHB5FZ1

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Interpret as DBGMCU_AHB5FZ1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)DBG_HPDMA1_CH0_STOP 0 (B_0x0)DBG_HPDMA1_CH1_STOP 0 (B_0x0)DBG_HPDMA1_CH2_STOP 0 (B_0x0)DBG_HPDMA1_CH3_STOP 0 (B_0x0)DBG_HPDMA1_CH4_STOP 0 (B_0x0)DBG_HPDMA1_CH5_STOP 0 (B_0x0)DBG_HPDMA1_CH6_STOP 0 (B_0x0)DBG_HPDMA1_CH7_STOP 0 (B_0x0)DBG_HPDMA1_CH8_STOP 0 (B_0x0)DBG_HPDMA1_CH9_STOP 0 (B_0x0)DBG_HPDMA1_CH10_STOP 0 (B_0x0)DBG_HPDMA1_CH11_STOP 0 (B_0x0)DBG_HPDMA1_CH12_STOP 0 (B_0x0)DBG_HPDMA1_CH13_STOP 0 (B_0x0)DBG_HPDMA1_CH14_STOP 0 (B_0x0)DBG_HPDMA1_CH15_STOP 0 (B_0x0)NPU_DBG_FREEZE

DBG_HPDMA1_CH8_STOP=B_0x0, DBG_HPDMA1_CH11_STOP=B_0x0, DBG_HPDMA1_CH3_STOP=B_0x0, DBG_HPDMA1_CH1_STOP=B_0x0, DBG_HPDMA1_CH0_STOP=B_0x0, DBG_HPDMA1_CH12_STOP=B_0x0, NPU_DBG_FREEZE=B_0x0, DBG_HPDMA1_CH9_STOP=B_0x0, DBG_HPDMA1_CH13_STOP=B_0x0, DBG_HPDMA1_CH10_STOP=B_0x0, DBG_HPDMA1_CH5_STOP=B_0x0, DBG_HPDMA1_CH14_STOP=B_0x0, DBG_HPDMA1_CH7_STOP=B_0x0, DBG_HPDMA1_CH4_STOP=B_0x0, DBG_HPDMA1_CH15_STOP=B_0x0, DBG_HPDMA1_CH6_STOP=B_0x0, DBG_HPDMA1_CH2_STOP=B_0x0

Description

DBGMCU AHB5 peripheral freeze register

Fields

DBG_HPDMA1_CH0_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH1_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH2_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH3_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH4_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH5_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH6_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH7_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH8_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH9_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH10_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH11_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH12_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH13_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH14_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
DBG_HPDMA1_CH15_STOP

HPDMA3_CHn suspend in debug

0 (B_0x0): Normal operation. HPDMA3_CHn continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. HPDMA3_CHn is suspended while Cortex-M55 is in debug mode.
NPU_DBG_FREEZE

NPU stop in debug mode

0 (B_0x0): Normal operation. The NPU continues to operate while Cortex-M55 is in debug mode.

1 (B_0x1): Stop in debug. NPU is suspended while Cortex-M55 is in debug mode.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32