stm32 /stm32n6 /STM32N647 /ETH /ETH_MACPHYCSR

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Interpret as ETH_MACPHYCSR

31282724232019161512118743000000000000000000000000000000000000000000 (TC)TC0 (B_0x0)LUD0 (B_0x0)LNKMOD0 (B_0x0)LNKSPEED0 (B_0x0)LNKSTS

LUD=B_0x0, LNKSPEED=B_0x0, LNKMOD=B_0x0, LNKSTS=B_0x0

Description

PHYIF control status register

Fields

TC

Transmit Configuration in RGMII

LUD

Link Up or Down

0 (B_0x0): Link Down

1 (B_0x1): Link Up

LNKMOD

Link Mode

0 (B_0x0): Half-duplex mode

1 (B_0x1): Full-duplex mode

LNKSPEED

Link Speed

0 (B_0x0): 2.5 MHz

1 (B_0x1): 25 MHz

2 (B_0x2): 125 MHz

LNKSTS

Link Status

0 (B_0x0): Link down

1 (B_0x1): Link up

Links

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