stm32 /stm32n6 /STM32N647 /ETH /ETH_MACVIR

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Interpret as ETH_MACVIR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0VLT0 (B_0x0)VLC0 (VLP)VLP 0 (B_0x0)CSVL 0 (VLTI)VLTI 0 (CBTI)CBTI 0 (B_0x0)ADDR 0 (RDWR)RDWR 0 (BUSY)BUSY

ADDR=B_0x0, VLC=B_0x0, CSVL=B_0x0

Description

VLAN inclusion register

Fields

VLT

VLAN Tag for Transmit Packets

VLC

VLAN Tag Control in Transmit Packets

0 (B_0x0): No VLAN tag deletion, insertion, or replacement

1 (B_0x1): VLAN tag deletion. The MAC removes the VLAN type (bytes 13 and 14) and VLAN tag (bytes 15 and 16) of all transmitted packets with VLAN tags.

2 (B_0x2): VLAN tag insertion. The MAC inserts VLT in bytes 15 and 16 of the packet after inserting the Type value (0x8100 or 0x88a8) in bytes 13 and 14. This operation is performed on all transmitted packets, irrespective of whether they already have a VLAN tag.

3 (B_0x3): VLAN tag replacement. The MAC replaces VLT in bytes 15 and 16 of all VLAN-type transmitted packets (Bytes 13 and 14 are 0x8100 or 0x88a8).

VLP

VLAN Priority Control

CSVL

C-VLAN or S-VLAN

0 (B_0x0): C-LAN

1 (B_0x1): S-LAN

VLTI

VLAN Tag Input

CBTI

Channel based tag insertion

ADDR

Address

0 (B_0x0): VLAN tag for insertion in the Transmit packets from Tx Queue 0

1 (B_0x1): VLAN tag for insertion in the Transmit packets from Tx Queue 1

RDWR

Read write control

BUSY

Busy

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