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stm32 /stm32n6 /STM32N647 /ETH /ETH_MTLTXQ1OMR

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Interpret as ETH_MTLTXQ1OMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FTQ)FTQ 0 (TSF)TSF 0 (B_0x0)TXQEN 0 (B_0x0)TTC0TQS

TTC=B_0x0, TXQEN=B_0x0

Description

T1 queue 1 operating mode Register

Fields

FTQ

Flush Transmit Queue
TSF

Transmit Store and Forward
TXQEN

Transmit Queue Enable

0 (B_0x0): Not enabled

1 (B_0x1): Enable in AV mode

2 (B_0x2): Enabled
TTC

Transmit Threshold Control

0 (B_0x0): 32

1 (B_0x1): 64

2 (B_0x2): 96

3 (B_0x3): 128

4 (B_0x4): 192

5 (B_0x5): 256

6 (B_0x6): 384

7 (B_0x7): 512
TQS

Transmit queue size

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32