IM27=B_0x0, IM24=B_0x0, IM17=B_0x0, IM20=B_0x0, IM18=B_0x0, IM28=B_0x0, IM21=B_0x0, IM26=B_0x0, IM30=B_0x0, IM23=B_0x0, IM29=B_0x0, IM22=B_0x0, IM25=B_0x0, IM19=B_0x0, IM31=B_0x0
EXTI CPU wake-up with interrupt mask register 1
| IM0 | CPU wake-up with interrupt mask on event input x |
| IM1 | CPU wake-up with interrupt mask on event input x |
| IM2 | CPU wake-up with interrupt mask on event input x |
| IM3 | CPU wake-up with interrupt mask on event input x |
| IM4 | CPU wake-up with interrupt mask on event input x |
| IM5 | CPU wake-up with interrupt mask on event input x |
| IM6 | CPU wake-up with interrupt mask on event input x |
| IM7 | CPU wake-up with interrupt mask on event input x |
| IM8 | CPU wake-up with interrupt mask on event input x |
| IM9 | CPU wake-up with interrupt mask on event input x |
| IM10 | CPU wake-up with interrupt mask on event input x |
| IM11 | CPU wake-up with interrupt mask on event input x |
| IM12 | CPU wake-up with interrupt mask on event input x |
| IM13 | CPU wake-up with interrupt mask on event input x |
| IM14 | CPU wake-up with interrupt mask on event input x |
| IM15 | CPU wake-up with interrupt mask on event input x |
| IM17 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM18 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM19 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM20 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM21 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM22 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM23 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM24 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM25 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM26 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM27 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM28 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM29 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM30 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |
| IM31 | CPU wake-up with interrupt mask on event input x 0 (B_0x0): Wake-up and interrupt from input event x is masked. 1 (B_0x1): Wake-up and interrupt from input event x is unmasked. CPU wake-up event and configurable event interrupt generated. |