Regviz

stm32 /stm32n6 /STM32N647 /FMC1 /FMC_PMEM

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FMC_PMEM

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/FMC1/FMC_PMEM#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)MEMSET0 (B_0x0)MEMWAIT0 (B_0x0)MEMHOLD0 (B_0x0)MEMHIZ

MEMSET=B_0x0, MEMHOLD=B_0x0, MEMWAIT=B_0x0, MEMHIZ=B_0x0

Description

FMC common memory space timing register

Fields

MEMSET

Common memory setup time

0 (B_0x0): 1 * fmc_ker_ck cycles

1 (B_0x1): 2 * fmc_ker_ck cycles

255 (B_0xFF): 256 * fmc_ker_ck cycles
MEMWAIT

Common memory wait time

0 (B_0x0): 1 * fmc_ker_ck cycles (+ wait cycle introduced by deasserting NWAIT)

1 (B_0x1): 2 * fmc_ker_ck cycles (+ wait cycle introduced by deasserting NWAIT)

255 (B_0xFF): 256 * fmc_ker_ck cycles (+ wait cycle introduced by deasserting NWAIT)
MEMHOLD

Common memory hold time

0 (B_0x0): 1 * fmc_ker_ck cycle

1 (B_0x1): 2 * fmc_ker_ck cycles

255 (B_0xFF): 256 * fmc_ker_ck cycles
MEMHIZ

Common memory data bus Hi-Z time

0 (B_0x0): 1 * fmc_ker_ck cycle

1 (B_0x1): 2 * fmc_ker_ck cycles

255 (B_0xFF): 256 * fmc_ker_ck cycles

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32