stm32 /stm32n6 /STM32N647 /GFXTIM /GFXTIM_TCR

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Interpret as GFXTIM_TCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)AFCEN 0 (B_0x0)FAFCR 0 (B_0x0)ALCEN 0 (B_0x0)FALCR 0 (B_0x0)RFC1EN 0 (B_0x0)RFC1CM 0 (B_0x0)FRFC1R 0 (B_0x0)RFC2EN 0 (B_0x0)RFC2CM 0 (B_0x0)FRFC2R

RFC2EN=B_0x0, FALCR=B_0x0, ALCEN=B_0x0, AFCEN=B_0x0, RFC2CM=B_0x0, FAFCR=B_0x0, FRFC2R=B_0x0, FRFC1R=B_0x0, RFC1CM=B_0x0, RFC1EN=B_0x0

Description

GFXTIM timers configuration register

Fields

AFCEN

absolute frame counter enable

0 (B_0x0): no effect

1 (B_0x1): absolute frame counter enabled

FAFCR

force absolute frame counter reset

0 (B_0x0): no effect

1 (B_0x1): absolute frame counter reset forced

ALCEN

absolute line counter enable

0 (B_0x0): no effect

1 (B_0x1): absolute line counter enabled

FALCR

force absolute line counter reset

0 (B_0x0): no effect

1 (B_0x1): absolute line counter reset forced

RFC1EN

relative frame counter 1 enable

0 (B_0x0): no effect

1 (B_0x1): relative frame counter enabled

RFC1CM

relative frame counter 1 continuous mode

0 (B_0x0): relative frame counter 1 is one shot.

1 (B_0x1): relative frame counter 1 is in continuous mode.

FRFC1R

force relative frame counter 1 reload

0 (B_0x0): no effect

1 (B_0x1): relative frame counter 1 reload forced

RFC2EN

relative frame counter 2 enable

0 (B_0x0): no effect

1 (B_0x1): relative frame counter 2 enabled

RFC2CM

relative frame counter 2 continuous mode

0 (B_0x0): relative frame counter 2 is one shot.

1 (B_0x1): relative frame counter 2 is in continuous mode.

FRFC2R

force relative frame counter 2 reload

0 (B_0x0): no effect

1 (B_0x1): relative frame counter 2 reload forced

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