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stm32 /stm32n6 /STM32N647 /GPIOP /GPIOP_HWCFGR3

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Interpret as GPIOP_HWCFGR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ODR_RES0OTYPER_RES

Description

GPIO port P hardware configuration register 3

Fields

ODR_RES

Output data register reset value
OTYPER_RES

Output type register reset value

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32