STOP=B_0x0, RD_WRN=B_0x0, HEAD10R=B_0x0, NACK=B_0x0, RELOAD=B_0x0, START=B_0x0, AUTOEND=B_0x0, PECBYTE=B_0x0, ADD10=B_0x0
I2C control register 2
| SADD | Slave address (master mode) |
| RD_WRN | Transfer direction (master mode) 0 (B_0x0): Master requests a write transfer. 1 (B_0x1): Master requests a read transfer. |
| ADD10 | 10-bit addressing mode (master mode) 0 (B_0x0): The master operates in 7-bit addressing mode, 1 (B_0x1): The master operates in 10-bit addressing mode |
| HEAD10R | 10-bit address header only read direction (master receiver mode) 0 (B_0x0): The master sends the complete 10 bit slave address read sequence: Start + 2 bytes 10bit address in write direction + Restart + 1st 7 bits of the 10 bit address in read direction. 1 (B_0x1): The master only sends the 1st 7 bits of the 10 bit address, followed by Read direction. |
| START | Start generation 0 (B_0x0): No Start generation. 1 (B_0x1): Restart/Start generation: |
| STOP | Stop generation (master mode) 0 (B_0x0): No Stop generation. 1 (B_0x1): Stop generation after current byte transfer. |
| NACK | NACK generation (slave mode) 0 (B_0x0): an ACK is sent after current received byte. 1 (B_0x1): a NACK is sent after current received byte. |
| NBYTES | Number of bytes |
| RELOAD | NBYTES reload mode 0 (B_0x0): The transfer is completed after the NBYTES data transfer (STOP or RESTART follows). 1 (B_0x1): The transfer is not completed after the NBYTES data transfer (NBYTES is reloaded). TCR flag is set when NBYTES data are transferred, stretching SCL low. |
| AUTOEND | Automatic end mode (master mode) 0 (B_0x0): software end mode: TC flag is set when NBYTES data are transferred, stretching SCL low. 1 (B_0x1): Automatic end mode: a STOP condition is automatically sent when NBYTES data are transferred. |
| PECBYTE | Packet error checking byte 0 (B_0x0): No PEC transfer. 1 (B_0x1): PEC transmission/reception is requested |